High Speed Programmable FIR Filters for FPGA

  • Shahid Hassan
  • Farhat Abbas Shah

Abstract

This paper presents high speed programmable FIR filters specifically designed for FPGA. Vendor provided components are used in Filter’s MAC
unit. FIR filters are programmable in terms of new coefficients. Both UDF & FDF of FIR filters are analyzed. Results are presented for 16bit-20taps and 8bit-20taps on 2s100tq144-6 of Xilinx Spartan-II FPGA. Maximum speed improvement of about 64.83% for 16bit-20taps, 49.70% for 8bit-20taps filter in UDF FIR filters and 48.3% for 16bit20taps, 21.47% for 8bit-20taps in FDF FIR filters have been achieved utilizing a small variation of area in some cores. Index Terms ---- Digital Signal Processing (DSP), Multiply Accumulate (MAC), Finite Impulse Response (FIR) filters, Application Specific Integrated circuits(ASIC) , Field Programmable Gate Arrays(FPGA), System-on-Chip (SoC) Design. UDF (Unfolded Direct Form), FDF (Folded Direct Form).

Published
2009-12-08